Publication detail
VHDL RT Level Parser/Analyser of a Source Code
ZBOŘIL, F.
English title
VHDL RT Level Parser/Analyser of a Source Code
Type
conference paper
Language
en
Original abstract
During our research activities in the field of testability analysis it was revealed that it is reasonable to perform the algorithms not on the VHDL source file, but rather on "an useable database" which reflects the structure of the circuit under analysis and the diagnostic features of the elements and connections between them. For this purpose an interface between VHDL source text and the software performing the analysis was defined. The paper deals with a special parser/analyser that accepts a subset of the IEEE Standard 1076 Hardware Description Language oriented to description of digital circuits on RT level of modelling. The parser/analyser produces a special database of four mutually depending files that is suitable for testability analysis.
English abstract
During our research activities in the field of testability analysis it was revealed that it is reasonable to perform the algorithms not on the VHDL source file, but rather on "an useable database" which reflects the structure of the circuit under analysis and the diagnostic features of the elements and connections between them. For this purpose an interface between VHDL source text and the software performing the analysis was defined. The paper deals with a special parser/analyser that accepts a subset of the IEEE Standard 1076 Hardware Description Language oriented to description of digital circuits on RT level of modelling. The parser/analyser produces a special database of four mutually depending files that is suitable for testability analysis.
Keywords in English
VHDL, RT Level, Testability Analysis
RIV year
2001
Released
01.01.2000
Publisher
Faculty of Electrical Engineering and Informatics, University of Technology Košice
Location
Košice
ISBN
80-88922-25-9
Book
Proceedings of the fourth international scientific conference Electronic Computers & Informatics'2000
Pages from–to
150–155
Pages count
6
BIBTEX
@inproceedings{BUT5417,
author="František {Zbořil},
title="VHDL RT Level Parser/Analyser of a Source Code",
booktitle="Proceedings of the fourth international scientific conference Electronic Computers & Informatics'2000",
year="2000",
month="January",
pages="150--155",
publisher="Faculty of Electrical Engineering and Informatics, University of Technology Košice",
address="Košice",
isbn="80-88922-25-9"
}